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NAME	SIZE	ACTIONS
📁 bitops		[ DEL ]
📁 vdso		[ DEL ]
📄 4level-fixup.h	1,098 B	[ EDIT ] \| [ DEL ]
📄 5level-fixup.h	1,273 B	[ EDIT ] \| [ DEL ]
📄 asm-offsets.h	35 B	[ EDIT ] \| [ DEL ]
📄 asm-prototypes.h	507 B	[ EDIT ] \| [ DEL ]
📄 atomic-instrumented.h	13,623 B	[ EDIT ] \| [ DEL ]
📄 atomic-long.h	8,048 B	[ EDIT ] \| [ DEL ]
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📄 audit_write.h	461 B	[ EDIT ] \| [ DEL ]
📄 barrier.h	6,868 B	[ EDIT ] \| [ DEL ]
📄 bitops-instrumented.h	7,909 B	[ EDIT ] \| [ DEL ]
📄 bitops.h	1,119 B	[ EDIT ] \| [ DEL ]
📄 bitsperlong.h	592 B	[ EDIT ] \| [ DEL ]
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📄 extable.h	802 B	[ EDIT ] \| [ DEL ]
📄 fb.h	271 B	[ EDIT ] \| [ DEL ]
📄 fixmap.h	2,904 B	[ EDIT ] \| [ DEL ]
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📄 futex.h	2,964 B	[ EDIT ] \| [ DEL ]
📄 getorder.h	1,487 B	[ EDIT ] \| [ DEL ]
📄 gpio.h	4,558 B	[ EDIT ] \| [ DEL ]
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📄 hugetlb.h	1,326 B	[ EDIT ] \| [ DEL ]
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📄 hyperv-tlfs.h	20,696 B	[ EDIT ] \| [ DEL ]
📄 ide_iops.h	791 B	[ EDIT ] \| [ DEL ]
📄 int-ll64.h	863 B	[ EDIT ] \| [ DEL ]
📄 io.h	24,167 B	[ EDIT ] \| [ DEL ]
📄 ioctl.h	506 B	[ EDIT ] \| [ DEL ]
📄 iomap.h	4,033 B	[ EDIT ] \| [ DEL ]
📄 irq.h	403 B	[ EDIT ] \| [ DEL ]
📄 irq_regs.h	980 B	[ EDIT ] \| [ DEL ]
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📄 percpu.h	13,026 B	[ EDIT ] \| [ DEL ]
📄 pgalloc.h	342 B	[ EDIT ] \| [ DEL ]
📄 pgtable-nop4d-hack.h	1,965 B	[ EDIT ] \| [ DEL ]
📄 pgtable-nop4d.h	1,772 B	[ EDIT ] \| [ DEL ]
📄 pgtable-nopmd.h	1,944 B	[ EDIT ] \| [ DEL ]
📄 pgtable-nopud.h	2,071 B	[ EDIT ] \| [ DEL ]
📄 pgtable.h	33,765 B	[ EDIT ] \| [ DEL ]
📄 pgtable_uffd.h	1,052 B	[ EDIT ] \| [ DEL ]
📄 preempt.h	1,994 B	[ EDIT ] \| [ DEL ]
📄 ptrace.h	1,615 B	[ EDIT ] \| [ DEL ]
📄 qrwlock.h	4,315 B	[ EDIT ] \| [ DEL ]
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📄 termios.h	2,877 B	[ EDIT ] \| [ DEL ]
📄 timex.h	508 B	[ EDIT ] \| [ DEL ]
📄 tlb.h	19,685 B	[ EDIT ] \| [ DEL ]
📄 tlbflush.h	485 B	[ EDIT ] \| [ DEL ]
📄 topology.h	2,234 B	[ EDIT ] \| [ DEL ]
📄 trace_clock.h	391 B	[ EDIT ] \| [ DEL ]
📄 uaccess.h	5,272 B	[ EDIT ] \| [ DEL ]
📄 unaligned.h	1,078 B	[ EDIT ] \| [ DEL ]
📄 unistd.h	318 B	[ EDIT ] \| [ DEL ]
📄 user.h	242 B	[ EDIT ] \| [ DEL ]
📄 vga.h	587 B	[ EDIT ] \| [ DEL ]
📄 vmlinux.lds.h	28,848 B	[ EDIT ] \| [ DEL ]
📄 vtime.h	52 B	[ EDIT ] \| [ DEL ]
📄 word-at-a-time.h	2,817 B	[ EDIT ] \| [ DEL ]
📄 xor.h	13,961 B	[ EDIT ] \| [ DEL ]

[ CLOSE ]

EDIT: bitops-instrumented.h

/* SPDX-License-Identifier: GPL-2.0 */

/*
 * This file provides wrappers with sanitizer instrumentation for bit
 * operations.
 *
 * To use this functionality, an arch's bitops.h file needs to define each of
 * the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
 * arch___set_bit(), etc.).
 */
#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_H
#define _ASM_GENERIC_BITOPS_INSTRUMENTED_H

#include <linux/kasan-checks.h>

/**
 * set_bit - Atomically set a bit in memory
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * This is a relaxed atomic operation (no implied memory barriers).
 *
 * Note that @nr may be almost arbitrarily large; this function is not
 * restricted to acting on a single-word quantity.
 */
static inline void set_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch_set_bit(nr, addr);
}

/**
 * __set_bit - Set a bit in memory
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * Unlike set_bit(), this function is non-atomic. If it is called on the same
 * region of memory concurrently, the effect may be that only one operation
 * succeeds.
 */
static inline void __set_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch___set_bit(nr, addr);
}

/**
 * clear_bit - Clears a bit in memory
 * @nr: Bit to clear
 * @addr: Address to start counting from
 *
 * This is a relaxed atomic operation (no implied memory barriers).
 */
static inline void clear_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch_clear_bit(nr, addr);
}

/**
 * __clear_bit - Clears a bit in memory
 * @nr: the bit to clear
 * @addr: the address to start counting from
 *
 * Unlike clear_bit(), this function is non-atomic. If it is called on the same
 * region of memory concurrently, the effect may be that only one operation
 * succeeds.
 */
static inline void __clear_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch___clear_bit(nr, addr);
}

/**
 * clear_bit_unlock - Clear a bit in memory, for unlock
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * This operation is atomic and provides release barrier semantics.
 */
static inline void clear_bit_unlock(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch_clear_bit_unlock(nr, addr);
}

/**
 * __clear_bit_unlock - Clears a bit in memory
 * @nr: Bit to clear
 * @addr: Address to start counting from
 *
 * This is a non-atomic operation but implies a release barrier before the
 * memory operation. It can be used for an unlock if no other CPUs can
 * concurrently modify other bits in the word.
 */
static inline void __clear_bit_unlock(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch___clear_bit_unlock(nr, addr);
}

/**
 * change_bit - Toggle a bit in memory
 * @nr: Bit to change
 * @addr: Address to start counting from
 *
 * This is a relaxed atomic operation (no implied memory barriers).
 *
 * Note that @nr may be almost arbitrarily large; this function is not
 * restricted to acting on a single-word quantity.
 */
static inline void change_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch_change_bit(nr, addr);
}

/**
 * __change_bit - Toggle a bit in memory
 * @nr: the bit to change
 * @addr: the address to start counting from
 *
 * Unlike change_bit(), this function is non-atomic. If it is called on the same
 * region of memory concurrently, the effect may be that only one operation
 * succeeds.
 */
static inline void __change_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	arch___change_bit(nr, addr);
}

/**
 * test_and_set_bit - Set a bit and return its old value
 * @nr: Bit to set
 * @addr: Address to count from
 *
 * This is an atomic fully-ordered operation (implied full memory barrier).
 */
static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch_test_and_set_bit(nr, addr);
}

/**
 * __test_and_set_bit - Set a bit and return its old value
 * @nr: Bit to set
 * @addr: Address to count from
 *
 * This operation is non-atomic. If two instances of this operation race, one
 * can appear to succeed but actually fail.
 */
static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch___test_and_set_bit(nr, addr);
}

/**
 * test_and_set_bit_lock - Set a bit and return its old value, for lock
 * @nr: Bit to set
 * @addr: Address to count from
 *
 * This operation is atomic and provides acquire barrier semantics if
 * the returned value is 0.
 * It can be used to implement bit locks.
 */
static inline bool test_and_set_bit_lock(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch_test_and_set_bit_lock(nr, addr);
}

/**
 * test_and_clear_bit - Clear a bit and return its old value
 * @nr: Bit to clear
 * @addr: Address to count from
 *
 * This is an atomic fully-ordered operation (implied full memory barrier).
 */
static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch_test_and_clear_bit(nr, addr);
}

/**
 * __test_and_clear_bit - Clear a bit and return its old value
 * @nr: Bit to clear
 * @addr: Address to count from
 *
 * This operation is non-atomic. If two instances of this operation race, one
 * can appear to succeed but actually fail.
 */
static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch___test_and_clear_bit(nr, addr);
}

/**
 * test_and_change_bit - Change a bit and return its old value
 * @nr: Bit to change
 * @addr: Address to count from
 *
 * This is an atomic fully-ordered operation (implied full memory barrier).
 */
static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch_test_and_change_bit(nr, addr);
}

/**
 * __test_and_change_bit - Change a bit and return its old value
 * @nr: Bit to change
 * @addr: Address to count from
 *
 * This operation is non-atomic. If two instances of this operation race, one
 * can appear to succeed but actually fail.
 */
static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch___test_and_change_bit(nr, addr);
}

/**
 * test_bit - Determine whether a bit is set
 * @nr: bit number to test
 * @addr: Address to start counting from
 */
static inline bool test_bit(long nr, const volatile unsigned long *addr)
{
	kasan_check_read(addr + BIT_WORD(nr), sizeof(long));
	return arch_test_bit(nr, addr);
}

#if defined(arch_clear_bit_unlock_is_negative_byte)
/**
 * clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
 *                                     byte is negative, for unlock.
 * @nr: the bit to clear
 * @addr: the address to start counting from
 *
 * This operation is atomic and provides release barrier semantics.
 *
 * This is a bit of a one-trick-pony for the filemap code, which clears
 * PG_locked and tests PG_waiters,
 */
static inline bool
clear_bit_unlock_is_negative_byte(long nr, volatile unsigned long *addr)
{
	kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
	return arch_clear_bit_unlock_is_negative_byte(nr, addr);
}
/* Let everybody know we have it. */
#define clear_bit_unlock_is_negative_byte clear_bit_unlock_is_negative_byte
#endif

#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_H */